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SBCCI
2005
ACM
185views VLSI» more  SBCCI 2005»
13 years 10 months ago
Automatic generation of test sets for SBST of microprocessor IP cores
Higher integration densities, smaller feature lengths, and other technology advances, as well as architectural evolution, have made microprocessor cores exceptionally complex. Cur...
Ernesto Sánchez, Matteo Sonza Reorda, Giova...
ISQED
2002
IEEE
203views Hardware» more  ISQED 2002»
13 years 9 months ago
Automatic Test Program Generation from RT-Level Microprocessor Descriptions
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach based on the generation of a test program. The proposed method relies on two p...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
VTS
2002
IEEE
120views Hardware» more  VTS 2002»
13 years 9 months ago
Software-Based Weighted Random Testing for IP Cores in Bus-Based Programmable SoCs
We present a software-based weighted random pattern scheme for testing delay faults in IP cores of programmable SoCs. We describe a method for determining static and transition pr...
Madhu K. Iyer, Kwang-Ting Cheng
GECCO
2004
Springer
148views Optimization» more  GECCO 2004»
13 years 10 months ago
Evolving Local Search Heuristics for SAT Using Genetic Programming
Satisfiability testing (SAT) is a very active area of research today, with numerous real-world applications. We describe CLASS2.0, a genetic programming system for semi-automatica...
Alex S. Fukunaga