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» A high level SoC power estimation based on IP modeling
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VLSID
2003
IEEE
77views VLSI» more  VLSID 2003»
14 years 5 months ago
A Methodology for Accurate Modeling of Energy Dissipation in Array Structures
There is an increasing need for obtaining a reasonably accurate estimate of energy dissipation in SoC designs. Array structures have a significant contribution to the total system...
Mahesh Mamidipaka, Nikil D. Dutt, Kamal S. Khouri
VLSID
1999
IEEE
139views VLSI» more  VLSID 1999»
13 years 9 months ago
Processor Modeling for Hardware Software Codesign
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...
V. Rajesh, Rajat Moona
CASES
2007
ACM
13 years 8 months ago
INTACTE: an interconnect area, delay, and energy estimation tool for microarchitectural explorations
Prior work on modeling interconnects has focused on optimizing the wire and repeater design for trading off energy and delay, and is largely based on low level circuit parameters....
Rahul Nagpal, Arvind Madan, Bharadwaj Amrutur, Y. ...
ICPR
2000
IEEE
13 years 9 months ago
Model-Based Halftoning for Color Image Segmentation
Grouping algorithms based on histograms over measured image features have very successfully been applied to textured image segmentation [2, 11, 6]. However, the competing goals of...
Jan Puzicha, Serge Belongie
WCNC
2008
IEEE
13 years 11 months ago
Novel Ultra Wideband Low Complexity Ranging Using Different Channel Statistics
—UWB technology can reach centimetre level ranging and positioning accuracy in LOS propagation when time of arrival techniques are used. However, in a real positioning system, th...
Giovanni Bellusci, Gerard J. M. Janssen, Junlin Ya...