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» A low energy architecture for fast PN acquisition
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ICCAD
2002
IEEE
103views Hardware» more  ICCAD 2002»
14 years 2 months ago
Synthesis of customized loop caches for core-based embedded systems
Embedded system programs tend to spend much time in small loops. Introducing a very small loop cache into the instruction memory hierarchy has thus been shown to substantially red...
Susan Cotterell, Frank Vahid
HPCA
2009
IEEE
14 years 6 months ago
A novel architecture of the 3D stacked MRAM L2 cache for CMPs
Magnetic Random Access Memory (MRAM) is considered to be a promising future memory technology due to its low leakage power, high density and fast read speed. The heterogeneous int...
Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yira...
MOBICOM
2012
ACM
11 years 8 months ago
RadioJockey: mining program execution to optimize cellular radio usage
Many networked applications that run in the background on a mobile device incur significant energy drains when using the cellular radio interface for communication. This is mainl...
Pavan K. Athivarapu, Ranjita Bhagwan, Saikat Guha,...
ICCD
2008
IEEE
111views Hardware» more  ICCD 2008»
14 years 2 months ago
Power switch characterization for fine-grained dynamic voltage scaling
—Dynamic voltage scaling (DVS) provides power savings for systems with varying performance requirements. One low overhead implementation of DVS uses PMOS power switches to connec...
Liang Di, Mateja Putic, John Lach, Benton H. Calho...
MICCAI
2007
Springer
14 years 6 months ago
Outlier Rejection for Diffusion Weighted Imaging
Abstract. This paper introduces an outlier rejection and signal reconstruction method for high angular resolution diffusion weighted imaging. The approach is based on the threshold...
Carl-Fredrik Westin, Marc Niethammer, Martha Eliza...