Sciweavers

45 search results - page 9 / 9
» A low-power clock frequency multiplier
Sort
View
OSDI
2002
ACM
14 years 5 months ago
Vertigo: Automatic Performance-Setting for Linux
Combining high performance with low power consumption is becoming one of the primary objectives of processor designs. Instead of relying just on sleep mode for conserving power, a...
Krisztián Flautner, Trevor N. Mudge
ICCAD
2007
IEEE
119views Hardware» more  ICCAD 2007»
13 years 7 months ago
IntSim: A CAD tool for optimization of multilevel interconnect networks
– Interconnect issues are becoming increasingly important for ULSI systems. IntSim, an interconnect CAD tool, has been developed to obtain pitches of different wiring levels and ...
Deepak C. Sekar, Azad Naeemi, Reza Sarvari, Jeffre...
ISCA
2000
IEEE
103views Hardware» more  ISCA 2000»
13 years 9 months ago
Circuits for wide-window superscalar processors
Our program benchmarks and simulations of novel circuits indicate that large-window processors are feasible. Using our redesigned superscalar components, a large-window processor ...
Dana S. Henry, Bradley C. Kuszmaul, Gabriel H. Loh...
SECON
2010
IEEE
13 years 3 months ago
iPoint: A Platform-Independent Passive Information Kiosk for Cell Phones
We introduce iPoint, a passive device that can interact and deliver information to virtually any mobile phone equipped with a WiFi network interface and a camera. The iPoint does n...
Hooman Javaheri, Guevara Noubir
CASES
2005
ACM
13 years 7 months ago
Software-directed power-aware interconnection networks
Interconnection networks have been deployed as the communication fabric in a wide range of parallel computer systems. With recent technological trends allowing growing quantities ...
Vassos Soteriou, Noel Eisley, Li-Shiuan Peh