110 search results - page 1 / 22 » A methodology based on Transportation problem modeling for d... |
ICASSP
2011
IEEE
12 years 8 months ago
2011
IEEE
For high-data-rate applications, turbo-like iterative decoders are implemented with parallel hardware architecture. However, to achieve high throughput, concurrent accesses to each...
IPPS
2005
IEEE
13 years 10 months ago
2005
IEEE
As semiconductor feature sizes decrease, interconnect delay is becoming a dominant component of processor cycle times. This creates a critical need to shift microarchitectural des...
CORR
2007
Springer
13 years 4 months ago
2007
Springer
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
SC
2009
ACM
13 years 11 months ago
2009
ACM
The UNIC code is being developed as part of the DOE’s Nuclear Energy Advanced Modeling and Simulation (NEAMS) program. UNIC is an unstructured, deterministic neutron transport c...
DAC
1997
ACM
13 years 8 months ago
1997
ACM
A methodology for architecture exploration of look-up table based decoders is presented. For the degree of parallel processing a trade-off can be made by exploring system level an...