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CGO
2006
IEEE
13 years 11 months ago
Thread-Shared Software Code Caches
Software code caches are increasingly being used to amortize the runtime overhead of dynamic optimizers, simulators, emulators, dynamic translators, dynamic compilers, and other t...
Derek Bruening, Vladimir Kiriansky, Timothy Garnet...
ICNS
2007
IEEE
13 years 12 months ago
A Case Study-based Performance Evaluation Framework for CSCF Processes on a Blade-Server
Abstract— The study of protocol behavior and traffic characteristics in a simulated environment is commonly supported by ad-hoc or general purpose simulators (e.g., Opnet, NS-2)...
Preetam Ghosh, Nirmalya Roy, Kalyan Basu, Sajal K....
DATE
2009
IEEE
98views Hardware» more  DATE 2009»
14 years 12 days ago
A real-time application design methodology for MPSoCs
This paper presents a novel technique for the modeling, simulation, and analysis of real-time applications on MultiProcessor Systems-on-Chip (MPSoCs). This technique is based on a...
Giovanni Beltrame, Luca Fossati, Donatella Sciuto
VLSID
2001
IEEE
200views VLSI» more  VLSID 2001»
14 years 6 months ago
Evaluation of the Traffic-Performance Characteristics of System-on-Chip Communication Architectures
The emergence of several communication architectures for System-on-Chips provides designers with a variety of design alternatives. In addition, the need to customize the system ar...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
MSWIM
2009
ACM
14 years 13 days ago
A performance evaluation framework for fair solutions in ad hoc networks
Fairness in multihop ad hoc networks has received considerable attention in the literature. Many schemes have been proposed, which attempt to compute the “optimal” bit rates o...
Manos Dramitinos, Rémi Vannier, Isabelle Gu...