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GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
13 years 9 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
MICRO
2003
IEEE
147views Hardware» more  MICRO 2003»
13 years 10 months ago
Flexible Compiler-Managed L0 Buffers for Clustered VLIW Processors
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
Enric Gibert, F. Jesús Sánchez, Anto...
MICRO
1999
IEEE
105views Hardware» more  MICRO 1999»
13 years 9 months ago
DIVA: A Reliable Substrate for Deep Submicron Microarchitecture Design
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...
Todd M. Austin