22 search results - page 3 / 5 » A new technique for estimating lower bounds on latency for h... |
ISLPED
1996
ACM
13 years 10 months ago
1996
ACM
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
ASPDAC
2005
ACM
13 years 7 months ago
2005
ACM
— This paper presents a multiple-voltage high-level synthesis methodology for low power DSP applications using algorithmic transformation techniques. Our approach is motivated by...
DC
2008
13 years 5 months ago
2008
This paper introduces solo-valency, a variation on the valency proof technique originated by Fischer, Lynch, and Paterson. The new technique focuses on critical events that influe...
MICRO
1999
IEEE
13 years 10 months ago
1999
IEEE
Since there is generally insufficient instruction level parallelism within a single basic block, higher performance is achieved by speculatively scheduling operations in superbloc...
ICASSP
2011
IEEE
12 years 9 months ago
2011
IEEE
In the important domain of array shape calibration, the near-field case poses a challenging problem due to the array response complexity induced by the range effect. In this pape...