285 search results - page 3 / 57 » A non-uniform cache architecture for low power system design |
LCTRTS
2007
Springer
13 years 11 months ago
2007
Springer
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
It is widely accepted that the disproportionate scaling of transistor and conventional on-chip interconnect performance presents a major barrier to future high performance systems...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
A new architectural technique to reduce power dissipation in data caches is proposed. In multimedia applications, a major portion of data cache accesses hit in the same cache set ...
DAC
2000
ACM
14 years 6 months ago
2000
ACM
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
ISLPED
1995
ACM
13 years 8 months ago
1995
ACM
In current processors, the cache controller, which contains the cache directory and other logic such as tag comparators, is active for each instruction fetch and is responsible fo...