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» A novel approach for network on chip emulation
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AHS
2006
IEEE
124views Hardware» more  AHS 2006»
13 years 11 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
DATE
2009
IEEE
98views Hardware» more  DATE 2009»
14 years 2 hour ago
A real-time application design methodology for MPSoCs
This paper presents a novel technique for the modeling, simulation, and analysis of real-time applications on MultiProcessor Systems-on-Chip (MPSoCs). This technique is based on a...
Giovanni Beltrame, Luca Fossati, Donatella Sciuto
DATE
2008
IEEE
170views Hardware» more  DATE 2008»
13 years 11 months ago
ETBR: Extended Truncated Balanced Realization Method for On-Chip Power Grid Network Analysis
In this paper, we present a novel simulation approach for power grid network analysis. The new approach, called ETBR for extended truncated balanced realization, is based on model...
Duo Li, Sheldon X.-D. Tan, Bruce McGaughy
NOCS
2007
IEEE
13 years 11 months ago
On the Design of a Photonic Network-on-Chip
Recent remarkable advances in nanoscale siliconphotonic integrated circuitry specifically compatible with CMOS fabrication have generated new opportunities for leveraging the uni...
Assaf Shacham, Keren Bergman, Luca P. Carloni
ICCD
2006
IEEE
182views Hardware» more  ICCD 2006»
14 years 2 months ago
A performance and power analysis of WK-Recursive and Mesh Networks for Network-on-Chips
—Network-on-Chip (NoC) has been proposed as an attractive alternative to traditional dedicated wires to achieve high performance and modularity. Power efficiency is one of the mo...
Dara Rahmati, Abbas Eslami Kiasari, Shaahin Hessab...