405 search results - page 2 / 81 » A novel cache architecture with enhanced performance and sec... |
DAC
2012
ACM
11 years 7 months ago
2012
ACM
Spin-Transfer Torque RAM (STT-RAM) is an emerging non-volatile memory (NVM) technology that has the potential to replace the conventional on-chip SRAM caches for designing a more ...
WMPI
2004
ACM
13 years 10 months ago
2004
ACM
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
ICC
2007
IEEE
13 years 11 months ago
2007
IEEE
— Passive Optical Networks (PONs) solve the bandwidth bottleneck issue as they extend optical networks to homes and businesses. Security concerns in time division multiplexed PON...
ICON
2007
IEEE
13 years 11 months ago
2007
IEEE
— Security is paramount in Mobile Ad-hoc Networks (MANET) as they are not conducive to centralized trusted authorities. Several solutions have been proposed MANET in the areas of...
HPCA
2005
IEEE
14 years 5 months ago
2005
IEEE
With the increasing concern of the security on high performance multiprocessor enterprise servers, more and more effort is being invested into defending against various kinds of a...