287 search results - page 5 / 58 » A novel improvement technique for high-level test synthesis |
CC
2011
Springer
12 years 9 months ago
2011
Springer
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
ICCAD
1994
IEEE
13 years 10 months ago
1994
IEEE
Interconnectperformance does not scale well into deep submicron dimensions, and the rising number of analog effects erodes tal abstraction necessary for high levels of integration...
DATE
2005
IEEE
13 years 11 months ago
2005
IEEE
— With increasing process fluctuations in nano-scale technology, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. Desig...
WCE
2007
13 years 7 months ago
2007
Improving testability during the early stages of High-level synthesis has several advantages including reduced test hardware overhead and design iterations. Recently, BIST techniq...
ICPR
2008
IEEE
14 years 7 months ago
2008
IEEE
In this paper, a new algorithm is developed for recovering the large disocclusion regions in depth image based rendering (DIBR) systems on 3DTV. For the DIBR systems, undesirable ...