13 search results - page 2 / 3 » A reconfigurable multi-function computing cache architecture |
CASES
2007
ACM
13 years 9 months ago
2007
ACM
We propose a technique which leverages configurable data caches to address the problem of cache interference in multitasking embedded systems. Data caches are often necessary to p...
IPPS
2006
IEEE
13 years 11 months ago
2006
IEEE
In this paper we study the performance improvements and trade-offs derived from an optimized mapping approach applied on a parametric coarse grained reconfigurable array architect...
FPL
2000
Springer
13 years 9 months ago
2000
Springer
Abstract. This work discusses the Memory Architecture for Reconfigurable Computers (MARC), a scalable, device-independent memory interface that supports both irregular (via configu...
MICRO
2000
IEEE
13 years 5 months ago
2000
IEEE
This paper demonstrates how an Instruction Path Coprocessor (I-COP) can be efficiently implemented using the PipeRench reconfigurable architecture. An I-COP is a programmable on-c...
HPCA
2008
IEEE
14 years 5 months ago
2008
IEEE
Power consumption within the disk-based storage subsystem forms a substantial portion of the overall energy footprint in commodity systems. Researchers have proposed external cach...