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IPPS 2006 International Parallel Processing Symposium

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IPPS
2006
IEEE

303views Distributed And Parallel Com...» more IPPS 2006»

Detecting selective forwarding attacks in wireless sensor networks

13 years 10 months ago

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Selective forwarding attacks may corrupt some missioncritical applications such as military surveillance and forest ﬁre monitoring. In these attacks, malicious nodes behave like...

Bo Yu, Bin Xiao

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Id	Views	Title	Status

1	303	Detecting selective forwarding attacks in wireless sensor networks	claim
2	273	Automatically translating a general purpose C++ image processing library for GPUs	claim
3	273	Online strategies for high-performance power-aware thread execution on emerging multiprocessors	claim
4	261	Preserving source location privacy in monitoring-based wireless sensor networks	claim
5	258	VHDL to FPGA automatic IP-Core generation: a case study on Xilinx design flow	claim
6	225	FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators	claim
7	221	A code motion technique for accelerating general-purpose computation on the GPU	claim
8	221	D1HT: a distributed one hop hash table	claim
9	216	Algorithm-based checkpoint-free fault tolerance for parallel matrix computations on volatile resources	claim
10	205	Compiler assisted dynamic management of registers for network processors	claim
11	203	Performance analysis of Java concurrent programming: a case study of video mining system	claim
12	196	High-performance computing in remotely sensed hyperspectral imaging: the Pixel Purity Index algorithm as a case study	claim
13	193	A brokering framework for large-scale heterogeneous systems	claim
14	190	A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead	claim
15	188	Coordinate transformation - a solution for the privacy problem of location based services?	claim
16	184	Hierarchically tiled arrays for parallelism and locality	claim
17	183	MT-ClustalW: multithreading multiple sequence alignment	claim
18	182	TPCC-UVa: an open-source TPC-C implementation for parallel and distributed systems	claim
19	179	Load balancing in the presence of random node failure and recovery	claim
20	178	Multiple sequence alignment by quantum genetic algorithm	claim
21	176	Implementation of a programmable array processor architecture for approximate string matching algorithms on FPGAs	claim
22	175	Algorithmic skeletons for stream programming in embedded heterogeneous parallel image processing applications	claim
23	175	Parallel morphological processing of hyperspectral image data on heterogeneous networks of computers	claim
24	172	Acceleration of a content-based image-retrieval application on the RDISK cluster	claim
25	170	Comparative study of price-based resource allocation algorithms for ad hoc networks	claim
26	170	Multisite co-allocation algorithms for computational grid	claim
27	169	Placement and routing of Boolean functions in constrained FPGAs using a distributed genetic algorithm and local search	claim
28	169	Cooperative load balancing for a network of heterogeneous computers	claim
29	169	Communication concept for adaptive intelligent run-time systems supporting distributed reconfigurable embedded systems	claim
30	167	Real-time task mapping and scheduling for collaborative in-network processing in DVS-enabled wireless sensor networks	claim
31	166	An economy-driven mapping heuristic for hierarchical master-slave applications in grid systems	claim
32	165	Battery aware dynamic scheduling for periodic task graphs	claim
33	165	An adaptive stabilization framework for distributed hash tables	claim
34	164	IMAGE: an approach to building standards-based enterprise grids	claim
35	163	Trust overlay networks for global reputation aggregation in P2P grid computing	claim
36	162	A distributed paging RAM grid system for wide-area memory sharing	claim
37	161	Battery-aware router scheduling in wireless mesh networks	claim
38	160	On the performance of parallel normalized explicit preconditioned conjugate gradient type methods	claim
39	159	MPEG-2 decoding in a stream programming language	claim
40	158	A framework for developing distributed location based applications	claim
41	157	Fault and intrusion tolerance of wireless sensor networks	claim
42	156	Memory minimization for tensor contractions using integer linear programming	claim
43	154	RAPID: an end-system aware protocol for intelligent data transfer over lambda grids	claim
44	151	Accelerating DTI tractography using FPGAs	claim
45	151	Achieving strong scaling with NAMD on Blue Gene/L	claim
46	150	Analysis of checksum-based execution schemes for pipelined processors	claim
47	150	An overview of the Jahob analysis system: project goals and current status	claim
48	150	A design of overlay anonymous multicast protocol	claim
49	150	Flexible tardiness bounds for sporadic real-time task systems on multiprocessors	claim
50	149	Chedar: peer-to-peer middleware	claim
51	149	Ant stigmergy on the grid: optimizing the cooling process in continuous steel casting	claim
52	149	The benefits of Java and Jini in the JGrid system	claim
53	149	Mapping DSP applications on processor systems with coarse-grain reconfigurable hardware	claim
54	149	A study of MPI performance analysis tools on Blue Gene/L	claim
55	148	An automated development framework for a RISC processor with reconfigurable instruction set extensions	claim
56	148	Helper thread prefetching for loosely-coupled multiprocessor systems	claim
57	146	Distributed Monte Carlo simulation of light transportation in tissue	claim
58	146	Dynamic resource allocation of computer clusters with probabilistic workloads	claim
59	145	Neighbourhood maps: decentralised ranking in small-world P2P networks	claim
60	144	An extensible global address space framework with decoupled task and data abstractions	claim
61	144	A parallel memetic algorithm applied to the total tardiness machine scheduling problem	claim
62	144	Implementation of a reconfigurable hard real-time control system for mechatronic and automotive applications	claim
63	144	Coterminous locality and coterminous group data prefetching on chip-multiprocessors	claim
64	143	A virtual network (ViNe) architecture for grid computing	claim
65	143	Fast distributed graph partition and application	claim
66	142	Aligning traces for performance evaluation	claim
67	142	A high level SoC power estimation based on IP modeling	claim
68	141	Babylon v2.0: middleware for distributed, parallel, and mobile Java applications	claim
69	140	Modeling malware propagation in Gnutella type peer-to-peer networks	claim
70	140	Predicting failures of computer systems: a case study for a telecommunication system	claim
71	140	Towards a universal client for grid monitoring systems: design and implementation of the Ovid browser	claim
72	139	Bio-sequence database scanning on a GPU	claim
73	139	The robot software communications architecture (RSCA): embedded middleware for networked service robots	claim
74	138	Lossless compression for large scale cluster logs	claim
75	138	An adaptive dynamic grid-based approach to data distribution management	claim
76	138	A segment-based DSM supporting large shared object space	claim
77	137	Towards a parallel framework of grid-based numerical algorithms on DAGs	claim
78	136	Reducing reconfiguration time of reconfigurable computing systems in integrated temporal partitioning and physical design framework	claim
79	135	On-chip and on-line self-reconfigurable adaptable platform: the non-uniform cellular automata case	claim
80	134	WaveGrid: a scalable fast-turnaround heterogeneous peer-based desktop grid system	claim
81	133	SAMIE-LSQ: set-associative multiple-instruction entry load/store queue	claim
82	133	Reconfigurable communications for image processing applications	claim
83	133	Formal modeling and analysis of wireless sensor network algorithms in Real-Time Maude	claim
84	132	A design environment for mobile applications	claim
85	132	Dynamic multi phase scheduling for heterogeneous clusters	claim
86	132	On-the-fly kernel updates for high-performance computing clusters	claim
87	132	On consistency maintenance in service discovery	claim
88	131	Exploiting programmable network interfaces for parallel query execution in workstation clusters	claim
89	131	Automatic application-specific microarchitecture reconfiguration	claim
90	130	On the impact of data input sets on statistical compiler tuning	claim
91	130	A method to improve structural modeling based on conserved domain clusters	claim
92	130	Parallel implementation of the replica exchange molecular dynamics algorithm on Blue Gene/L	claim
93	130	Performance evaluation of supercomputers using HPCC and IMB benchmarks	claim
94	129	Parallelisation of a simulation tool for casting and solidification processes on Windows platforms	claim
95	129	SmartNetSolve: high-level programming system for high performance grid computing	claim
96	129	Analytical performance modelling of partially adaptive routing in wormhole hypercubes	claim
97	129	Centralized versus distributed schedulers for multiple bag-of-task applications	claim
98	128	Collective operations in NEC's high-performance MPI libraries	claim
99	128	Wire-speed total order	claim
100	127	k-anycast routing schemes for mobile ad hoc networks	claim
101	127	Network intrusion detection with semantics-aware capability	claim
102	127	Speeding up NGB with distributed file streaming framework	claim
103	126	Exploiting unbalanced thread scheduling for energy and performance on a CMP of SMT processors	claim
104	125	Using virtual grids to simplify application scheduling	claim
105	125	Towards building a highly-available cluster based model for high performance computing	claim
106	125	Schedulability analysis of AADL models	claim
107	125	A look at application performance sensitivity to the bandwidth and latency of InfiniBand networks	claim
108	124	Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic	claim
109	124	An optimal architecture for a DDC	claim
110	124	Schedulability analysis of non-preemptive recurring real-time tasks	claim
111	124	A calculus of functional BSP programs with projection	claim
112	124	Selection of instruction set extensions for an FPGA embedded processor core	claim
113	124	An approach to locality-conscious load balancing and transparent memory hierarchy management with a global-address-space parallel programming model	claim
114	122	Modeling and executing master-worker applications in component models	claim
115	122	Decentralized runtime analysis of multithreaded applications	claim
116	122	A study of the on-chip interconnection network for the IBM Cyclops64 multi-core architecture	claim
117	122	Securing embedded programmable gate arrays in secure circuits	claim
118	122	Multi-clock pipelined design of an IEEE 802.11a physical layer transmitter	claim
119	122	Selecting the tile shape to reduce the total communication volume	claim
120	121	Design and analysis of a multi-dimensional data sampling service for large scale data analysis applications	claim
121	121	Instability in parallel job scheduling simulation: the role of workload flurries	claim
122	121	Exploiting processing locality through paging configurations in multitasked reconfigurable systems	claim
123	120	A portable real-time emulator for testing multi-radio MANETs	claim
124	120	GPU-ABiSort: optimal parallel sorting on stream architectures	claim
125	120	High-level execution and communication support for parallel grid applications in JGrid	claim
126	120	QoS-based management of multiple shared resource in dynamic real-time systems	claim
127	119	Incrementally developing parallel applications with AspectJ	claim
128	119	A compiler-based communication analysis approach for multiprocessor systems	claim
129	118	A performance model for fine-grain accesses in UPC	claim
130	118	Relationships between communication models in networks using atomic registers	claim
131	118	Accelerating shape optimizing load balancing for parallel FEM simulations by algebraic multigrid	claim
132	118	Conjugate gradient sparse solvers: performance-power characteristics	claim
133	118	Detecting phases in parallel applications on shared memory architectures	claim
134	117	Early evaluation of the Cray XT3	claim
135	117	Dynamic performance prediction of an adaptive mesh application	claim
136	117	Dynamic program phase detection in distributed shared-memory multiprocessors	claim
137	117	An adaptive system-on-chip for network applications	claim
138	116	The GHS grid scheduling system: implementation and performance comparison	claim
139	116	Exploring the design space of an optimized compiler approach for mesh-like coarse-grained reconfigurable architectures	claim
140	116	Simulating a PR-mesh on an LARPBS	claim
141	116	The monitoring request interface (MRI)	claim
142	116	Broadcasting and routing in faulty mesh networks	claim
143	116	Comparison of MPI benchmark programs on an SGI Altix ccNUMA shared memory machine	claim
144	115	Platform-based FPGA architecture: designing high-performance and low-power routing structure for realizing DSP applications	claim
145	115	Monitoring remotely executing shared memory programs in software DSMs	claim
146	115	A decomposition approach for optimizing the performance of MPI libraries	claim
147	115	Similarity-aware query processing in sensor networks	claim
148	114	Parallel ICA methods for EEG neuroimaging	claim
149	114	Techniques and tools for dynamic optimization	claim
150	114	A task duplication based bottom-up scheduling algorithm for heterogeneous environments	claim
151	114	I/O conscious algorithm design and systems support for data analysis on emerging architectures	claim
152	114	An automated approach to improve communication-computation overlap in clusters	claim
153	113	Self-stabilizing distributed algorithms for graph alliances	claim
154	113	Parallel implementation of evolutionary strategies on heterogeneous clusters with load balancing	claim
155	113	Quantifying and reducing the effects of wrong-path memory references in cache-coherent multiprocessor systems	claim
156	113	Checkpointing and rollback-recovery protocol for mobile systems with MW session guarantee	claim
157	113	Improving cooperation in peer-to-peer systems using social networks	claim
158	113	A multiprocessor architecture for the massively parallel model GCA	claim
159	113	Compatible phase co-scheduling on a CMP of multi-threaded processors	claim
160	112	Shubac: a searchable P2P network utilizing dynamic paths for client/server anonymity	claim
161	112	Concurrent counting is harder than queuing	claim
162	112	Multiprocessor on chip: beating the simulation wall through multiobjective design space exploration with direct execution	claim
163	112	Dedicated module access in dynamically reconfigurable systems	claim
164	112	Performance analysis of stochastic process algebra models using stochastic simulation	claim
165	112	Simulating and optimizing a peer-to-peer computing framework	claim
166	112	Schedulability analysis of AR-TP, a Ravenscar compliant communication protocol for high-integrity distributed systems	claim
167	112	A probabilistic approach for fault tolerant multiprocessor real-time scheduling	claim
168	111	Cooperative checkpointing theory	claim
169	110	Enhancing L2 organization for CMPs with a center cell	claim
170	110	Free network measurement for adaptive virtualized distributed computing	claim
171	109	Saburo, a tool for I/O and concurrency management in servers	claim
172	109	Easy and reliable cluster management: the self-management experience of Fire Phoenix	claim
173	109	Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs	claim
174	109	A combined genetic-neural algorithm for mobility management	claim
175	109	Parallelizing post-placement timing optimization	claim
176	108	Support for adaptivity in ARMCI using migratable objects	claim
177	108	Parallelization and performance characterization of protein 3D structure prediction of Rosetta	claim
178	108	Effecting parallel graph eigensolvers through library composition	claim
179	108	Exploiting dynamic proxies in middleware for distributed, parallel, and mobile Java applications	claim
180	107	FPGA based architecture for DNA sequence comparison and database search	claim
181	107	A hierarchical scheduling model for component-based real-time systems	claim
182	107	A dependable infrastructure of the electric network for e-textiles	claim
183	107	The interleaved authentication for filtering false reports in multipath routing based sensor networks	claim
184	106	Cache-oblivious simulation of parallel programs	claim
185	106	Hash-based proximity clustering for load balancing in heterogeneous DHT networks	claim
186	106	Coordinated checkpoint from message payload in pessimistic sender-based message logging	claim
187	106	An overview of data aggregation architecture for real-time tracking with sensor networks	claim
188	106	Performance Analysis of the Reactor Pattern in Network Services	claim
189	106	Reducing the associativity and size of step caches in CRCW operation	claim
190	104	Performance evaluation of an enhanced distributed channel access protocol under heterogeneous traffic	claim
191	104	Dual-layered file cache on cc-NUMA system	claim
192	104	A job monitoring system for the LCG computing grid	claim
193	104	Improving cache locality for thread-level speculation	claim
194	104	Model-based evaluation of search strategies in peer-to-peer networks	claim
195	104	A formal framework for the performance analysis of P2P networks protocols	claim
196	104	Linyphi: an IPv6-compatible implementation of SSR	claim
197	104	Towards an analysis of race carrier conditions in real-time Java	claim
198	104	Automatic code generation for distributed memory architectures in the polytope model	claim
199	103	Parallelization of module network structure learning and performance tuning on SMP	claim
200	103	Optimal map construction of an unknown torus	claim
201	103	Realization of virtual networks in the DECOS integrated architecture	claim
202	102	Fault tolerance with real-time Java	claim
203	102	An experimental study of optimizing bioinformatics applications	claim
204	102	Anticipated distributed task scheduling for grid environments	claim
205	102	Using incentives to increase availability in a DHT	claim
206	102	On collaborative content distribution using multi-message gossip	claim
207	102	A simulator for parallel applications with dynamically varying compute node allocation	claim
208	102	Parallel multiple sequence alignment with local phylogeny search by simulated annealing	claim
209	101	Execution and composition of e-science applications using the WS-resource construct	claim
210	101	Enhancing downlink performance in wireless networks by simultaneous multiple packet transmission	claim
211	101	Grid solutions for biological and physical cross-site simulations on the TeraGrid	claim
212	101	A nonself space approach to network anomaly detection	claim
213	101	Workflow fine-grained concurrency with automatic continuation	claim
214	101	Plan switching: an approach to plan execution in changing environments	claim
215	100	Parallel genetic algorithm for SPICE model parameter extraction	claim
216	100	Remove the memory wall: from performance modeling to architecture optimization	claim
217	100	Timed automata based analysis of embedded system architectures	claim
218	100	Architecture of a multi-context FPGA using a hybrid multiple-valued/binary context switching signal	claim
219	100	Performance evaluation of wormhole routed network processor-memory interconnects	claim
220	100	A real-time PES supporting runtime state restoration after transient hardware-faults	claim
221	100	Parallel implementation of a quartet-based algorithm for phylogenetic analysis	claim
222	99	Executing MPI programs on virtual machines in an Internet sharing system	claim
223	99	Fault injection in distributed Java applications	claim
224	99	An optimal approach to the task allocation problem on hierarchical architectures	claim
225	99	Auto-pipe and the X language: a pipeline design tool and description language	claim
226	99	Performance of FPGA implementation of bit-split architecture for intrusion detection systems	claim
227	98	Solving generic role assignment exactly	claim
228	98	Structural and algorithmic issues of dynamic protocol update	claim
229	98	New parallel programming abstractions and the role of compilers	claim
230	98	Decentralized and dynamic bandwidth allocation in networked control systems	claim
231	97	Evaluating I/O characteristics and methods for storing structured scientific data	claim
232	97	Making lockless synchronization fast: performance implications of memory reclamation	claim
233	97	Parallel implementation and performance characterization of MUSCLE	claim
234	97	Tree partition based parallel frequent pattern mining on shared memory systems	claim
235	97	Parallel algorithms for inductance extraction of VLSI circuits	claim
236	97	Loosely-coupled loop scheduling in computational grids	claim
237	97	A simulation study of the effects of multi-path approaches in e-commerce applications	claim
238	97	A pattern selection algorithm for multi-pattern scheduling	claim
239	96	Ad-hoc distributed spatial joins on mobile devices	claim
240	96	FIFO scheduling of divisible loads with return messages under the one-port model	claim
241	96	Oblivious parallel probabilistic channel utilization without control channels	claim
242	96	Learning computing models from cells and tissues: P systems	claim
243	96	Towards MPI progression layer elimination with TCP and SCTP	claim
244	95	Interceptor: middleware-level application segregation and scheduling for P2P systems	claim
245	95	Pipelined broadcast on Ethernet switched clusters	claim
246	95	An evaluation of heuristics for SLA based parallel job scheduling	claim
247	94	Algorithmic models for sensor networks	claim
248	94	Honeybees: combining replication and evasion for mitigating base-station jamming in sensor networks	claim
249	94	Dynamic configuration steering for a reconfigurable superscalar processor	claim
250	94	On the probability distribution of busy virtual channels	claim
251	94	A case for exploit-robust and attack-aware protocol RFCs	claim
252	94	Node-disjoint paths in hierarchical hypercube networks	claim
253	94	A distributed method for dynamic resolution of BGP oscillations	claim
254	94	Wrekavoc: a tool for emulating heterogeneity	claim
255	93	Ant-inspired query routing performance in dynamic peer-to-peer networks	claim
256	93	Simulation of a hybrid model for image denoising	claim
257	93	Power-performance efficiency of asymmetric multiprocessors for multi-threaded scientific applications	claim
258	93	Self-organized task allocation for computing systems with reconfigurable components	claim
259	93	Dynamically reconfigurable cache architecture using adaptive block allocation policy	claim
260	93	Using SCTP to hide latency in MPI programs	claim
261	92	A parallel exact hybrid approach for solving multi-objective problems on the computational grid	claim
262	91	Power-aware data dissemination protocols in wireless sensor networks	claim
263	91	Composite Abortable Locks	claim
264	91	Benefits of high speed interconnects to cluster file systems: a case study with Lustre	claim
265	91	Power consumption advantage of a dynamic optically reconfigurable gate array	claim
266	91	Analysis of a reconfigurable network processor	claim
267	91	Compiler and runtime support for predictive control of power and cooling	claim
268	91	Increasing analog programmability in SoCs	claim
269	91	iWarp protocol kernel space software implementation	claim
270	91	A proactive fault-detection mechanism in large-scale cluster systems	claim
271	90	Parallel FPGA-based all-pairs shortest-paths in a directed graph	claim
272	90	Optimizing bandwidth limited problems using one-sided communication and overlap	claim
273	90	MegaProto/E: power-aware high-performance cluster with commodity technology	claim
274	89	Making a case for a Green500 list	claim
275	89	Adaptability management and deterministic scheduling of media flows on parallel storage servers	claim
276	89	Techniques supporting threadprivate in OpenMP	claim
277	89	An integrated approach for density control and routing in wireless sensor networks	claim
278	89	An advanced performance analysis of self-stabilizing protocols: stabilization time with transient faults during convergence	claim
279	89	Performance and power analysis of time-multiplexed execution on dynamically reconfigurable processor	claim
280	89	Power consumption comparison for regular wireless topologies using fault-tolerant beacon vector routing	claim
281	88	Base line performance measurements of access controls for libraries and modules	claim
282	88	Physically-aware exploitation of component reuse in a partially reconfigurable architecture	claim
283	87	A general data dependence analysis to nested loop using integer interval theory	claim
284	87	Dynamic power saving in fat-tree interconnection networks using on/off links	claim
285	87	ReConfigME: a detailed implementation of an operating system for reconfigurable computing	claim
286	87	A framework to develop symbolic performance models of parallel applications	claim
287	86	Improving locality of nonserial polyadic dynamic programming	claim
288	86	Seekable sockets: a mechanism to reduce copy overheads in TCP-based messaging	claim
289	86	Evaluating cooperative checkpointing for supercomputing systems	claim
290	85	Evaluating parallel simulated evolution strategies for VLSI cell placement	claim
291	85	A stochastic multi-objective algorithm for the design of high performance reconfigurable architectures	claim
292	85	Supporting self-adaptation in streaming data mining applications	claim
293	85	Parallel calculation of volcanoes for cryptographic uses	claim
294	85	Skewed allocation of non-uniform data for broadcasting over multiple channels	claim
295	85	A preliminary analysis of the InfiniPath and XD1 network interfaces	claim
296	84	Web server protection by customized instruction set encoding	claim
297	84	Tree-based overlay networks for scalable applications	claim
298	83	Performance evaluation of scheduling applications with DAG topologies on multiclusters with independent local schedulers	claim
299	83	Designing next generation data-centers with advanced communication protocols and systems services	claim
300	83	Design and analysis of matching circuit architectures for a closest match lookup	claim
301	83	Topology-aware task mapping for reducing communication contention on large parallel machines	claim
302	82	Recent advances in checkpoint/recovery systems	claim
303	82	Reconfiguration of embedded Java applications	claim
304	81	Lightweight emulation to study peer-to-peer systems	claim
305	81	Improving cluster utilization through intelligent processor sharing	claim
306	81	Plan-based replication for fault-tolerant multi-agent systems	claim
307	80	Phylospaces: reconstructing evolutionary trees in tuple space	claim
308	80	Empowering a helper cluster through data-width aware instruction selection policies	claim
309	80	Performance analysis of parallel programs via message-passing graph traversal	claim
310	80	A self-stabilizing minimal dominating set algorithm with safe convergence	claim
311	80	Privacy-aware presence management in instant messaging systems	claim
312	79	Modelling job allocation where service duration is unknown	claim
313	79	A physical particle and plane framework for load balancing in multiprocessors	claim
314	79	Investigation into programmability for layer 2 protocol frame delineation architectures	claim
315	79	Phylogenetic models of rate heterogeneity: a high performance computing perspective	claim
316	79	Modeling user perceived unavailability due to long response times	claim
317	78	2D defragmentation heuristics for hardware multitasking on reconfigurable devices	claim
318	78	Distributed algorithm for a color assignment on asynchronous rings	claim
319	77	Leakage-aware multiprocessor scheduling for low power	claim
320	76	The impact of heterogeneity on master-slave on-line scheduling	claim
321	75	Non-cooperative, semi-cooperative, and cooperative games-based grid resource allocation	claim
322	74	Using stochastic Petri nets for performance modelling of application servers	claim
323	74	Sim-X: parallel system software for interactive multi-experiment computational studies	claim
324	74	Resource management with stateful support for analytic applications	claim
325	73	Workforce planning with parallel algorithms	claim
326	73	A tool for environment deployment in clusters and light grids	claim
327	73	An entropy-based algorithm for time-driven software instrumentation in parallel systems	claim
328	72	A nature-inspired algorithm for the disjoint paths problem	claim
329	71	RTOS extensions for dynamic hardware / software monitoring and configuration management	claim
330	71	Statistical sampling of microarchitecture simulation	claim
331	67	A dynamic firing speculation to speedup distributed symbolic state-space generation	claim
332	65	Rapid development of high performance floating-point pipelines for scientific simulation	claim
333	60	OVIS: a tool for intelligent, real-time monitoring of computational clusters	claim

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