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DAC
2005
ACM
14 years 6 months ago
Memory access optimization through combined code scheduling, memory allocation, and array binding in embedded system design
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
Jungeun Kim, Taewhan Kim
ICCAD
2009
IEEE
117views Hardware» more  ICCAD 2009»
13 years 3 months ago
Binning optimization based on SSTA for transparently-latched circuits
With increasing process variation, binning has become an important technique to improve the values of fabricated chips, especially in high performance microprocessors where transpa...
Min Gong, Hai Zhou, Jun Tao, Xuan Zeng
DAC
2005
ACM
14 years 6 months ago
Fault and energy-aware communication mapping with guaranteed latency for applications implemented on NoC
As feature sizes shrink, transient failures of on-chip network links become a critical problem. At the same time, many applications require guarantees on both message arrival prob...
Sorin Manolache, Petru Eles, Zebo Peng
JGAA
2006
100views more  JGAA 2006»
13 years 5 months ago
Orthogonal Hypergraph Drawing for Improved Visibility
Visualization of circuits is an important research area in electronic design automation. One commonly accepted method to visualize a circuit aligns the gates to layers and uses or...
Thomas Eschbach, Wolfgang Günther, Bernd Beck...