This paper deals with placing chips on an MCM substrate in chip array style for minimizing the system failure rate. The placement procedure begins with constructing an initial pla...
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...
Genetic algorithms require relatively large computation time to solve optimization problems, especially in VLSI CAD such as module placement. Therefore, island-based parallel GAs a...
We present an approach to spatial inference which is based on the procedural semantics of spatial relations. In contrast to qualitative reasoning, we do not use discrete symbolic m...
Sylvia Wiebrock, Lars Wittenburg, Ute Schmid, Frit...
—Chemical–mechanical polishing (CMP) is an enabling technique used in deep-submicrometer VLSI manufacturing to achieve long range oxide planarization. Post-CMP oxide topography...