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» A retargetable micro-architecture simulator
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ISSS
2002
IEEE
141views Hardware» more  ISSS 2002»
13 years 9 months ago
An Accelerated Datapath Width Optimization Scheme for Area Reduction of Embedded Systems
Datapath width optimization is very effective for reducing the area of a custom-made embedded system. The trivial way of optimization is to iteratively customize, evaluate, and r...
Hiroto Yasuura, Yun Cao, Mohammad Mesbah Uddin
SIGGRAPH
2010
ACM
13 years 9 months ago
Sampling-based contact-rich motion control
Human motions are the product of internal and external forces, but these forces are very difficult to measure in a general setting. Given a motion capture trajectory, we propose ...
Libin Liu, KangKang Yin, Michiel van de Panne, Tia...
CGO
2004
IEEE
13 years 8 months ago
VHC: Quickly Building an Optimizer for Complex Embedded Architectures
To meet the high demand for powerful embedded processors, VLIW architectures are increasingly complex (e.g., multiple clusters), and moreover, they now run increasingly sophistica...
Michael Dupré, Nathalie Drach, Olivier Tema...
ICCAD
2004
IEEE
147views Hardware» more  ICCAD 2004»
14 years 1 months ago
Interval-valued reduced order statistical interconnect modeling
9, IO]. However, unlike the case with static timing, it is not so easy We show how recent advances in the handling of correlated interval representations of range uncertainty can b...
James D. Ma, Rob A. Rutenbar
MTV
2005
IEEE
100views Hardware» more  MTV 2005»
13 years 10 months ago
A Study of Architecture Description Languages from a Model-based Perspective
Abstract— Owing to the recent trend of using applicationspecific instruction-set processors (ASIP), many Architecture Description Languages (ADLs) have been created. They specif...
Wei Qin, Sharad Malik