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CISIS
2009
IEEE
14 years 23 days ago
Designing Regular Network-on-Chip Topologies under Technology, Architecture and Software Constraints
—Regular multi-core processors are appearing in the embedded system market as high performance software programmable solutions. The use of regular interconnect fabrics for them a...
Francisco Gilabert Villamón, Daniele Ludovi...
ASYNC
2007
IEEE
154views Hardware» more  ASYNC 2007»
14 years 9 days ago
Design of a High-Speed Asynchronous Turbo Decoder
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-perf...
Pankaj Golani, Georgios D. Dimou, Mallika Prakash,...
IEEESCC
2005
IEEE
13 years 11 months ago
SOA Without Web Services: a Pragmatic Implementation of SOA for Financial Transactions Systems
The Service Oriented Architecture (SOA) provides a methodology for designing software systems by integrating loosely coupled services. Compared to traditional distributed object-o...
Ziyang Duan, Subhra Bose, Charles A. Shoniregun, P...
IPPS
2007
IEEE
14 years 8 days ago
Formal Analysis for Debugging and Performance Optimization of MPI
High-end computing is universally recognized to be a strategic tool for leadership in science and technology. A significant portion of high-end computing is conducted on clusters...
Ganesh Gopalakrishnan, Robert M. Kirby
GLOBECOM
2009
IEEE
14 years 21 days ago
Peer-to-Peer Single Hop Distributed Hash Tables
Abstract—Efficiently locating information in large-scale distributed systems is a challenging problem to which Peer-to-Peer (P2P) Distributed Hash Tables (DHTs) can provide a hi...
Luiz Rodolpho Monnerat, Cláudio L. Amorim