17 search results - page 1 / 4 » A scheduling algorithm for multiport memory minimization in ... |
ASPDAC
1995
ACM
13 years 8 months ago
1995
ACM
- In this paper, we present a new scheduling algorithms that generates area-efficient register transfer level datapaths with multiport memories. The proposed scheduling algorithm a...
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
Multiport memories are extensively used in modern system designs because of the performance advantages they offer. The increased memory access throughput could lead to significan...
FPGA
1995
ACM
13 years 8 months ago
1995
ACM
A novel approach is presented for transforming a given scheduled and bound signal processing algorithm for a multiplexer based datapath to a BUS/RAM based FPGA datapath. A datapat...
VLSID
2003
IEEE
14 years 5 months ago
2003
IEEE
In this paper, we describe two new algorithms for datapath scheduling which aim at energy reduction while maintaining performance. The proposed algorithms, time constrained and re...
ISSS
1995
IEEE
13 years 8 months ago
1995
IEEE
Decisions taken at the earliest steps of the design process may have a significantimpact on the characteristics of the final implementation. This paper illustrates how power con...