359 search results - page 2 / 72 » A section cache system designed for VLIW architectures |
MICRO
2003
IEEE
13 years 11 months ago
2003
IEEE
Wire delays are a major concern for current and forthcoming processors. One approach to attack this problem is to divide the processor into semi-independent units referred to as c...
MICRO
2002
IEEE
13 years 10 months ago
2002
IEEE
Clustering is a common technique to overcome the wire delay problem incurred by the evolution of technology. Fully-distributed architectures, where the register file, the functio...
IEEEPACT
2005
IEEE
13 years 11 months ago
2005
IEEE
VLIW architectures are popular in embedded systems because they offer high-performance processing at low cost and energy. The major problem with traditional VLIW designs is that t...
ISCA
2010
IEEE
13 years 11 months ago
2010
IEEE
Previous research has shown that Staged Execution (SE), i.e., dividing a program into segments and executing each segment at the core that has the data and/or functionality to bes...
ASPDAC
2000
ACM
13 years 9 months ago
2000
ACM
Quality of service (QoS) has been an important topic of many research communities. Combined with an advanced and retargetable compiler, variability of applicationsspecific very lar...