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» A simple, verified validator for software pipelining
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ICSE
2008
IEEE-ACM
14 years 5 months ago
On the difficulty of replicating human subjects studies in software engineering
Replications play an important role in verifying empirical results. In this paper, we discuss our experiences performing a literal replication of a human subjects experiment that ...
Jonathan Lung, Jorge Aranda, Steve M. Easterbrook,...
PLDI
2009
ACM
13 years 11 months ago
Proving optimizations correct using parameterized program equivalence
Translation validation is a technique for checking that, after an optimization has run, the input and output of the optimization are equivalent. Traditionally, translation validat...
Sudipta Kundu, Zachary Tatlock, Sorin Lerner
TACAS
1998
Springer
98views Algorithms» more  TACAS 1998»
13 years 9 months ago
Efficient Modeling of Memory Arrays in Symbolic Ternary Simulation
This paper enables symbolic ternary simulation of systems with large embedded memories. Each memory array is replaced with a behavioral model, where the number of symbolic variable...
Miroslav N. Velev, Randal E. Bryant
EMSOFT
2007
Springer
13 years 8 months ago
Verification of device drivers and intelligent controllers: a case study
The soundness of device drivers generally cannot be verified in isolation, but has to take into account the reactions of the hardware devices. In critical embedded systems, interf...
David Monniaux
ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
12 years 8 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...