61 search results - page 2 / 13 » A simultaneous routing tree construction and fanout optimiza... |
ICCAD
1997
IEEE
13 years 9 months ago
1997
IEEE
In this paper, we study the interconnect layout optimization problem under a higher-order RLC model to optimize not just delay, but also waveform for RLC circuits with non-monoton...
EUROPAR
2004
Springer
13 years 10 months ago
2004
Springer
In hot-potato (deflection) routing, nodes in the network have no buffers for packets in transit, so that some conflicting packets must be deflected away from their destination...
SODA
2003
ACM
13 years 6 months ago
2003
ACM
We consider the problem of finding efficient trees to send information from k sources to a single sink in a network where information can be aggregated at intermediate nodes in t...
ASPDAC
2005
ACM
13 years 11 months ago
2005
ACM
- Routing is one of the important steps in VLSI/ULSI physical design. The rectilinear Steiner minimum tree (RSMT) construction is an essential part of routing. Since macro cells, I...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Interconnect delay has become a critical factor in determining the performance of integrated circuits. Routing and buffering are powerful means of improving the circuit speed and ...