2 search results - page 1 / 1 » A slew-rate controlled output driver with one-cycle tuning t... |
ICCAD
2001
IEEE
14 years 2 months ago
2001
IEEE
In high-speed digital VLSI design, bounding the load capacitance at gate outputs is a well-known methodology to improve coupling noise immunity, reduce degradation of signal trans...
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
