132 search results - page 1 / 27 » A statistical multiprocessor cache model |
ISPASS
2006
IEEE
13 years 11 months ago
2006
IEEE
ICCD
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper explores statistical simulation as a fast simulation technique for driving chip multiprocessor (CMP) design space exploration. The idea of statistical simulation is to ...
IISWC
2006
IEEE
13 years 11 months ago
2006
IEEE
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor systemon-chip. An external memory that is shared between processors is a bottl...
HPCA
2005
IEEE
14 years 5 months ago
2005
IEEE
This paper studies the impact of L2 cache sharing on threads that simultaneously share the cache, on a Chip Multi-Processor (CMP) architecture. Cache sharing impacts threads non-u...