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JUCS
2007
208views more  JUCS 2007»
13 years 5 months ago
The Architecture and Circuital Implementation Scheme of a New Cell Neural Network for Analog Signal Processing
: It is a difficult problem that using cellular neural network to make up of analog signal processing circuit. This paper presented the architecture of new cellular neural network ...
Youren Wang, Zhiqiang Zhang, Jiang Cui
HICSS
2002
IEEE
127views Biometrics» more  HICSS 2002»
13 years 10 months ago
Weaving Community with Community Fibre: Community Informatics and the Broadband Revolution
Unexpectedly, the widespread availability of very very high speed (Broadband) bandwidth into communities and within large centres has become not only a long-term possibility but a...
Michael Gurstein
FPGA
2009
ACM
482views FPGA» more  FPGA 2009»
13 years 10 months ago
A 17ps time-to-digital converter implemented in 65nm FPGA technology
This paper presents a new architecture for time-to-digital conversion enabling a time resolution of 17ps over a range of 50ns with a conversion rate of 20MS/s. The proposed archit...
Claudio Favi, Edoardo Charbon
ANCS
2006
ACM
13 years 9 months ago
Efficient memory utilization on network processors for deep packet inspection
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
Piti Piyachon, Yan Luo