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EMSOFT
2006
Springer
13 years 9 months ago
A timing model for synchronous language implementations in simulink
We describe a simple scheme for mapping synchronous language models, in the form of Boolean Mealy Machines, into timed automata. The mapping captures certain idealized implementat...
Timothy Bourke, Arcot Sowmya
EMSOFT
2005
Springer
13 years 11 months ago
Distributing synchronous programs using bounded queues
This paper is about the modular compilation and distribution of a sub-class of Simulink programs [9] across networks using bounded FIFO queues. The problem is first addressed mat...
Marco Zennaro, Raja Sengupta
ASWSD
2004
Springer
13 years 10 months ago
Simulink Integration of Giotto/TDL
The paper first presents the integration options of what we call the Timing Description Language (TDL) with MathWorks' Simulink tools. Based on the paradigm of logical executi...
Wolfgang Pree, Gerald Stieglbauer, Josef Templ
FPL
2004
Springer
205views Hardware» more  FPL 2004»
13 years 10 months ago
A System Level Resource Estimation Tool for FPGAs
Abstract. High level modeling tools make it possible to synthesize a high performance FPGA design directly from a Simulink model. Accurate estimates of the FPGA resources required ...
Changchun Shi, James Hwang, Scott McMillan, Ann Ro...
ECMDAFA
2009
Springer
115views Hardware» more  ECMDAFA 2009»
13 years 12 months ago
Managing Flexibility: Modeling Binding-Times in Simulink
Abstract. Model-based development is supposed to improve the development efficiency by raising the abstraction level and generating applications instead of manually coding the appl...
Danilo Beuche, Jens Weiland