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» Accelerating high-level bounded model checking
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CAV
2004
Springer
152views Hardware» more  CAV 2004»
13 years 11 months ago
Abstract Regular Model Checking
Regular Tree Model Checking Ahmed Bouajjani, Peter Habermehl 1 LIAFA, University Paris 7, Case 7014, 2, place Jussieu, F-75251 Paris Cedex 05, France Adam Rogalewicz, Tom´aˇs Voj...
Ahmed Bouajjani, Peter Habermehl, Tomás Voj...
VLSID
2010
IEEE
155views VLSI» more  VLSID 2010»
13 years 3 months ago
Synchronized Generation of Directed Tests Using Satisfiability Solving
Directed test generation is important for the functional verification of complex system-on-chip designs. SAT based bounded model checking is promising for counterexample generatio...
Xiaoke Qin, Mingsong Chen, Prabhat Mishra
ATVA
2005
Springer
132views Hardware» more  ATVA 2005»
13 years 11 months ago
Flat Counter Automata Almost Everywhere!
Abstract. This paper argues that flatness appears as a central notion in the verification of counter automata. A counter automaton is called flat when its control graph can be ...
Jérôme Leroux, Grégoire Sutre
VISUALIZATION
2005
IEEE
13 years 11 months ago
A Shader-Based Parallel Rendering Framework
Existing parallel or remote rendering solutions rely on communicating pixels, OpenGL commands, scene-graph changes or application-specific data. We propose an intermediate soluti...
Jérémie Allard, Bruno Raffin
SIGMOD
2004
ACM
147views Database» more  SIGMOD 2004»
14 years 5 months ago
Robust Query Processing through Progressive Optimization
Virtually every commercial query optimizer chooses the best plan for a query using a cost model that relies heavily on accurate cardinality estimation. Cardinality estimation erro...
Volker Markl, Vijayshankar Raman, David E. Simmen,...