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» Accelerator compiler for the VENICE vector processor
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FPGA
2012
ACM
337views FPGA» more  FPGA 2012»
12 years 16 days ago
Accelerator compiler for the VENICE vector processor
Zhiduo Liu, Aaron Severance, Satnam Singh, Guy G. ...
MICRO
2010
IEEE
175views Hardware» more  MICRO 2010»
13 years 2 months ago
Efficient Selection of Vector Instructions Using Dynamic Programming
Accelerating program performance via SIMD vector units is very common in modern processors, as evidenced by the use of SSE, MMX, VSE, and VSX SIMD instructions in multimedia, scien...
Rajkishore Barik, Jisheng Zhao, Vivek Sarkar
ASPLOS
2010
ACM
13 years 11 months ago
MacroSS: macro-SIMDization of streaming applications
SIMD (Single Instruction, Multiple Data) engines are an essential part of the processors in various computing markets, from servers to the embedded domain. Although SIMD-enabled a...
Amir Hormati, Yoonseo Choi, Mark Woh, Manjunath Ku...