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IEEEPACT
2005
IEEE
13 years 11 months ago
Dual-Core Execution: Building a Highly Scalable Single-Thread Instruction Window
Current integration trends embrace the prosperity of single-chip multi-core processors. Although multi-core processors deliver significantly improved system throughput, single-thr...
Huiyang Zhou
HPCA
2002
IEEE
14 years 6 months ago
Evaluation of a Multithreaded Architecture for Cellular Computing
Cyclops is a new architecture for high performance parallel computers being developed at the IBM T. J. Watson Research Center. The basic cell of this architecture is a single-chip...
Calin Cascaval, José G. Castaños, Lu...
ISCI
2007
108views more  ISCI 2007»
13 years 5 months ago
A degree-constrained QoS-aware routing algorithm for application layer multicast
Application layer multicast (ALM) provides a low-cost solution for multicast over the Internet. It overcomes the deployment hurdle of IP multicast by moving all multicast related ...
Baoliu Ye, Minyi Guo, Daoxu Chen, Sanglu Lu
CF
2009
ACM
14 years 4 days ago
Wave field synthesis for 3D audio: architectural prospectives
In this paper, we compare the architectural perspectives of the Wave Field Synthesis (WFS) 3D-audio algorithm mapped on three different platforms: a General Purpose Processor (GP...
Dimitris Theodoropoulos, Catalin Bogdan Ciobanu, G...