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TC
2008
13 years 4 months ago
Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model
Abstract-- Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in the design c...
Wei Huang, Karthik Sankaranarayanan, Kevin Skadron...
ISCA
2003
IEEE
168views Hardware» more  ISCA 2003»
13 years 10 months ago
Temperature-Aware Microarchitecture
With power density and hence cooling costs rising exponentially, processor packaging can no longer be designed for the worst case, and there is an urgent need for runtime processo...
Kevin Skadron, Mircea R. Stan, Wei Huang, Sivakuma...
ICCD
2005
IEEE
102views Hardware» more  ICCD 2005»
14 years 1 months ago
Monitoring Temperature in FPGA based SoCs
FPGA logic densities continue to increase at a tremendous rate. This has had the undesired consequence of increased power density, which manifests itself as higher ondie temperatu...
Sivakumar Velusamy, Wei Huang, John Lach, Mircea R...
ISLPED
2006
ACM
99views Hardware» more  ISLPED 2006»
13 years 10 months ago
Thermal via allocation for 3D ICs considering temporally and spatially variant thermal power
All existing methods for thermal-via allocation are based on a steady-state thermal analysis and may lead to excessive number of thermal vias. This paper develops an accurate and ...
Hao Yu, Yiyu Shi, Lei He, Tanay Karnik