Sciweavers

6 search results - page 2 / 2
» Activity-Aware Registers Placement for Low Power Gated Clock...
Sort
View
ICCAD
1995
IEEE
129views Hardware» more  ICCAD 1995»
13 years 8 months ago
Activity-driven clock design for low power circuits
In this paper we investigate activity-driven clock trees to reduce the dynamic power consumption of synchronous digital CMOS circuits. Sections of an activity-driven clock tree ca...
Gustavo E. Téllez, Amir H. Farrahi, Majid S...