Sciweavers

73 search results - page 2 / 15
» Activity-Driven Synthesis of State Machines
Sort
View
DAC
1991
ACM
13 years 8 months ago
A Unified Approach for the Synthesis of Self-Testable Finite State Machines
-Conventionallyself-test hardware is added after synthesis is completed. For highly sequential circuits like controllersthis design method eitherleads to high hardware overheadsor ...
Bernhard Eschermann, Hans-Joachim Wunderlich
ITC
1999
IEEE
105views Hardware» more  ITC 1999»
13 years 9 months ago
Finite state machine synthesis with concurrent error detection
A new synthesis technique for designing finite state machines with on-line parity checking is presented. The output logic and the next-state logic of the finite state machines are...
Chaohuang Zeng, Nirmal R. Saxena, Edward J. McClus...
ICCD
1992
IEEE
84views Hardware» more  ICCD 1992»
13 years 8 months ago
Synthesis of 3D Asynchronous State Machines
We describe a new synthesis procedure for designing asynchronous controllers from burst-mode specifications, a class of specifications allowing multiple input change fundamental m...
Kenneth Y. Yun, David L. Dill, Steven M. Nowick
ISCAS
2002
IEEE
125views Hardware» more  ISCAS 2002»
13 years 9 months ago
Switching activity estimation of finite state machines for low power synthesis
A technique for computing the switching activity of synchronous Finite State Machine (FSM) implementations including the influence of temporal correlation among the next state si...
Mikael Kerttu, Per Lindgren, Mitchell A. Thornton,...
FPL
2000
Springer
155views Hardware» more  FPL 2000»
13 years 8 months ago
Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs
This paper discusses the design and implementation of finite state machines (FSM) with combinational circuits that are built primarily from RAM blocks. It suggests a novel state as...
Valery Sklyarov