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» Adaptive insertion policies for managing shared caches
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ISCA
2006
IEEE
182views Hardware» more  ISCA 2006»
13 years 11 months ago
Cooperative Caching for Chip Multiprocessors
This paper presents CMP Cooperative Caching, a unified framework to manage a CMP’s aggregate on-chip cache resources. Cooperative caching combines the strengths of private and ...
Jichuan Chang, Gurindar S. Sohi
MICRO
2009
IEEE
207views Hardware» more  MICRO 2009»
14 years 12 days ago
Extending the effectiveness of 3D-stacked DRAM caches with an adaptive multi-queue policy
3D-integration is a promising technology to help combat the “Memory Wall” in future multi-core processors. Past work has considered using 3D-stacked DRAM as a large last-level...
Gabriel H. Loh
ICPP
2008
IEEE
14 years 6 days ago
Taming Single-Thread Program Performance on Many Distributed On-Chip L2 Caches
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
Lei Jin, Sangyeun Cho
IISWC
2006
IEEE
13 years 11 months ago
Modeling Cache Sharing on Chip Multiprocessor Architectures
— As CMPs are emerging as the dominant architecture for a wide range of platforms (from embedded systems and game consoles, to PCs, and to servers) the need to manage on-chip res...
Pavlos Petoumenos, Georgios Keramidas, Håkan...
VLDB
2002
ACM
141views Database» more  VLDB 2002»
13 years 5 months ago
A Multi-version Cache Replacement and Prefetching Policy for Hybrid Data Delivery Environments
This paper introduces MICP, a novel multiversion integrated cache replacement and prefetching algorithm designed for efficient cache and transaction management in hybrid data deli...
André Seifert, Marc H. Scholl