116 search results - page 1 / 24 » Address generation for memories containing multiple arrays |
TCAD
1998
13 years 4 months ago
1998
This paper presents techniques for generating addresses for memories containing multiple arrays. Because these techniques rely on the inversion or rearrangement of address bits, t...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
Multimedia applications are characterized by a large number of data accesses and complex array index manipulations. The built-in address decoder in the RAM memory model commonly u...
ISMVL
2006
IEEE
13 years 10 months ago
2006
IEEE
A multiple-valued input address generator produces a unique address given a multiple-valued input data vector. This paper presents methods to realize multiple-valued input address...
ISSS
2000
IEEE
13 years 9 months ago
2000
IEEE
In high-throughput real-time media processing systems, the communication between processing units is typically specified as multi-dimensional arrays. However, the implementation ...
ICASSP
2008
IEEE
13 years 11 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...