44 search results - page 1 / 9 » Allocator implementations for network-on-chip routers |
ERSA
2006
13 years 6 months ago
2006
Abstract-- With the constantly increasing gate capacity of FPGAs, a single FPGA chip is able to employ large-scale applications. To connect a large number of computational nodes, N...
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
—In this paper, we examine the design process of a Network on-Chip (NoC) for a high-end commercial System onChip (SoC) application. We present several design choices and focus on...
SC
2009
ACM
13 years 11 months ago
2009
ACM
The present contribution explores the design space for virtual channel (VC) and switch allocators in network-on-chip (NoC) routers. Based on detailed RTL-level implementations, we...
ISCA
2005
IEEE
13 years 10 months ago
2005
IEEE
Pipelined forwarding engines are used in core routers to meet speed demands. Tree-based searches are pipelined across a number of stages to achieve high throughput, but this resul...
NGC
2002
Springer
13 years 4 months ago
2002
Springer
In this paper we aim at developing a solution to fairly allocating bandwidth among unicast and multicast flows. For this purpose, we propose the anycast max-min fairness criterion,...