2 search results - page 1 / 1 » Almost optimum placement legalization by minimum cost flow a... |
ISPD
2004
ACM
13 years 10 months ago
2004
ACM
VLSI placement tools usually work in two steps: First, the cells that have to be placed are roughly spread out over the chip area ignoring disjointness (global placement). Then, i...
DAC
2009
ACM
14 years 6 months ago
2009
ACM
As VLSI technology enters the nanoscale regime, interconnect delay has become the bottleneck of the circuit timing. As one of the most powerful techniques for interconnect optimiz...