33 search results - page 2 / 7 » An Adaptive, Reconfigurable Interconnect for Computational C... |
CF
2007
ACM
13 years 8 months ago
2007
ACM
As we enter the era of petascale computing, system architects must plan for machines composed of tens or even hundreds of thousands of processors. Although fully connected network...
ICDCS
2002
IEEE
13 years 9 months ago
2002
IEEE
CLUSTER
2006
IEEE
13 years 11 months ago
2006
IEEE
Interconnect speeds currently surpass the abilities of today’s processors to satisfy their demands. The throughput rate provided by the network simply generates too much protoco...
ICPP
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, we explore the use of hierarchically structured multiprocessor tasks (M-tasks) for programming multi-core cluster systems. These systems often have hierarchically s...
WOB
2004
13 years 6 months ago
2004
ABSTRACT. Reconfigurable systolic arrays can be adapted to efficiently resolve a wide spectrum of computational problems; parallelism is naturally explored in systolic arrays and r...