35 search results - page 7 / 7 » An Adaptive Scheduling Policy for Staged Applications |
HPCA
2009
IEEE
14 years 5 months ago
2009
IEEE
Heterogeneous multicores, such as Cell BE processors and GPGPUs, typically do not have caches for their accelerator cores because coherence traffic, cache misses, and latencies fr...
SSDBM
2000
IEEE
13 years 9 months ago
2000
IEEE
In a previous paper [Shoshani et al 99], we described a system called STACS (Storage Access Coordination System) for High Energy and Physics (HEP) experiments. These experiments g...
ASPLOS
2008
ACM
13 years 6 months ago
2008
ACM
Today's processors provide a rich source of statistical information on application execution through hardware counters. In this paper, we explore the utilization of these sta...
IPPS
2009
IEEE
13 years 11 months ago
2009
IEEE
The use of asymmetric multi-core processors with onchip computational accelerators is becoming common in a variety of environments ranging from scientific computing to enterprise...
NOSSDAV
2010
Springer
13 years 8 months ago
2010
Springer
Recent advance in scalable video coding (SVC) makes it possible for users to receive the same video with different qualities. To adopt SVC in P2P streaming, two key design questio...