51 search results - page 3 / 11 » An Analytical Model of Multistage Interconnection Networks |
ASPDAC
2010
ACM
13 years 3 months ago
2010
ACM
- In this paper, we propose a novel and global A3MAP (Architecture-Aware Analytic Mapping) algorithm applied to NoC (Networks-on-Chip) based MPSoC (Multi-Processor System-on-Chip) ...
EUROMICRO
1996
IEEE
13 years 9 months ago
1996
IEEE
In thispaper,a mathematicalmethodfor analysis of synchronous packet-switching interconnection networks with jinite buffering capacity at the output of switching elements ispresent...
ISCA
2006
IEEE
13 years 11 months ago
2006
IEEE
We show that the problem of communication in a quantum computer reduces to constructing reliable quantum channels by distributing high-fidelity EPR pairs. We develop analytical m...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
The necklace hypercube has recently been introduced as an attractive alternative to the well-known hypercube. Previous research on this network topology has mainly focused on topo...
ISQED
2007
IEEE
13 years 11 months ago
2007
IEEE
Abstract—A Network-on-Chip (NoC) replaces on-chip communication implemented by point-to-point interconnects in a multi-core environment by a set of shared interconnects connected...