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» An Array Data Flow Analysis Based Communication Optimizer
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DSD
2010
IEEE
161views Hardware» more  DSD 2010»
13 years 6 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
EWSN
2009
Springer
14 years 6 months ago
Flow-Based Real-Time Communication in Multi-Channel Wireless Sensor Networks
As many radio chips used in today's sensor mote hardware can work at different frequencies, several multi-channel communication protocols have recently been proposed to improv...
Xiaodong Wang, Xiaorui Wang, Xing Fu, Guoliang Xin...
MICRO
2005
IEEE
117views Hardware» more  MICRO 2005»
13 years 11 months ago
A Quantum Logic Array Microarchitecture: Scalable Quantum Data Movement and Computation
Recent experimental advances have demonstrated technologies capable of supporting scalable quantum computation. A critical next step is how to put those technologies together into...
Tzvetan S. Metodi, Darshan D. Thaker, Andrew W. Cr...
CODES
2004
IEEE
13 years 9 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan
CODES
1999
IEEE
13 years 10 months ago
Scheduling with optimized communication for time-triggered embedded systems
We present an approach to process scheduling for synthesis of safety-critical distributed embedded systems. Our system model captures both the flow of data and that of control. Th...
Paul Pop, Petru Eles, Zebo Peng