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» An Efficient Design of High Speed Network Security Platform ...
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ANCS
2006
ACM
13 years 9 months ago
Efficient memory utilization on network processors for deep packet inspection
Deep Packet Inspection (DPI) refers to examining both packet header and payload to look for predefined patterns, which is essential for network security, intrusion detection and c...
Piti Piyachon, Yan Luo
ERSA
2009
91views Hardware» more  ERSA 2009»
13 years 3 months ago
Configuration with Self-Configured Datapath: A High Speed Configuration Method for Dynamically Reconfigurable Processors
Configuration with Self-configured Data Path (CSDP) is a high speed configuration data loading method for Dynamically Reconfigurable Processors (DRPs). By using a prepared configu...
Toru Sano, Yoshiki Saito, Hideharu Amano
ISJGP
2010
13 years 2 months ago
On the Hardware Implementation Cost of Crypto-Processors Architectures
A variety of modern technologies such as networks, Internet, and electronic services demand private and secure communications for a great number of everyday transactions. Security ...
Nicolas Sklavos
ANCS
2009
ACM
13 years 3 months ago
EINIC: an architecture for high bandwidth network I/O on multi-core processors
This paper proposes a new server architecture EINIC (Enhanced Integrated NIC) for multi-core processors to tackle the mismatch between network speed and host computational capacit...
Guangdeng Liao, Laxmi N. Bhuyan, Danhua Guo, Steve...
CCR
1999
138views more  CCR 1999»
13 years 5 months ago
Context-agile encryption for high speed communication networks
Different applications have different security requirements for data privacy, data integrity, and authentication. Encryption is one technique that addresses these requirements. En...
Lyndon G. Pierson, Edward L. Witzke, Mark O. Bean,...