5 search results - page 1 / 1 » An Embedded DRAM for CMOS ASICs |
ARVLSI
1997
IEEE
13 years 9 months ago
1997
IEEE
The growing gap between on-chip gates and off-chip I/O bandwidth argues for ever larger amounts of on-chip memory. Emerging portable consumer technology, such as digital cameras, ...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
An embedded 40 MHz FIFO buffer for use in mixed-signal information processing applications is presented. The buffer design uses a 1T DRAM topology for its unit memory cell compone...
ESTIMEDIA
2003
Springer
13 years 10 months ago
2003
Springer
Recognizing speech, gestures, and visual features are important interface capabilities for embedded mobile systems. Perception algorithms have many traits in common with more conv...
DSD
2008
IEEE
13 years 11 months ago
2008
IEEE
In this paper, we examine the digital hardware design and implementation of a novel compact block cipher, referred to as PUFFIN, that is suitable for embedded applications. An imp...
ISCAS
2007
IEEE
13 years 11 months ago
2007
IEEE
—The paper presents architecture and synthesis results for an organic computing hardware for smart CMOS camera chips. The organic behavior in the chip hardware is based on distri...