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» An Embedded Processor for Integrated Navigation Receiver
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ASAP
2007
IEEE
118views Hardware» more  ASAP 2007»
13 years 6 months ago
Evaluation of a Tightly Coupled ASIP / Co-Processor Architecture Used in GNSS Receivers
This paper presents the enhancement of an ASIP’s floating point performance by coupling of a co-processor and adding of special instructions. Processor hardware modifications an...
Götz Kappen, S. el Bahri, O. Priebe, Tobias G...
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
13 years 11 months ago
Implementing the Best Processor Cores
It is well-known that varying architectural, technological and implementation aspects of embedded microprocessors, such as ARM, can produce widely differing performance and power ...
Vamsi Boppana, Rahoul Varma, S. Balajee
CORR
2010
Springer
121views Education» more  CORR 2010»
13 years 4 months ago
GNSS-based positioning: Attacks and Countermeasures
Increasing numbers of mobile computing devices, user-portable, or embedded in vehicles, cargo containers, or the physical space, need to be aware of their location in order to prov...
P. Papadimitratos, A. Jovanovic
JUCS
2010
124views more  JUCS 2010»
13 years 3 months ago
Performance Optimizations for DAA Signatures on Java enabled Platforms
: With the spreading of embedded and mobile devices, public-key cryptography has become an important feature for securing communication and protecting personal data. However, the c...
Kurt Dietrich, Franz Röck