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HPCA
2009
IEEE
14 years 5 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
CLUSTER
2006
IEEE
13 years 11 months ago
Resource Management for Interactive Jobs in a Grid Environment
1 Most recent Grid middleware technologies have been aimed at the execution of sequential batch jobs. However, some users require interactive access when running jobs on Grid sites...
Enol Fernández, Elisa Heymann, Miquel A. Se...
SC
2000
ACM
13 years 9 months ago
Real-Time Biomechanical Simulation of Volumetric Brain Deformation for Image Guided Neurosurgery
We aimed to study the performance of a parallel implementation of an intraoperative nonrigid registration algorithm that accurately simulates the biomechanical properties of the b...
Simon K. Warfield, Matthieu Ferrant, Xavier Gallez...
EUROPAR
2008
Springer
13 years 7 months ago
DGSim: Comparing Grid Resource Management Architectures through Trace-Based Simulation
Abstract. Many advances in grid resource management are still required to realize the grid computing vision of the integration of a worldwide computing infrastructure for scientifi...
Alexandru Iosup, Omer Ozan Sonmez, Dick H. J. Epem...
HPCA
2005
IEEE
14 years 5 months ago
Distributing the Frontend for Temperature Reduction
Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the h...
Antonio González, Grigorios Magklis, Jos&ea...