Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
1 Most recent Grid middleware technologies have been aimed at the execution of sequential batch jobs. However, some users require interactive access when running jobs on Grid sites...
We aimed to study the performance of a parallel implementation of an intraoperative nonrigid registration algorithm that accurately simulates the biomechanical properties of the b...
Simon K. Warfield, Matthieu Ferrant, Xavier Gallez...
Abstract. Many advances in grid resource management are still required to realize the grid computing vision of the integration of a worldwide computing infrastructure for scientifi...
Alexandru Iosup, Omer Ozan Sonmez, Dick H. J. Epem...
Due to increasing power densities, both on-chip average and peak temperatures are fast becoming a serious bottleneck in processor design. This is due to the cost of removing the h...