149 search results - page 2 / 30 » An approach for implementing efficient superscalar CISC proc... |
ICS
2001
Tsinghua U.
13 years 9 months ago
2001
Tsinghua U.
A large logical register file is important to allow effective compiler transformations or to provide a windowed space of registers to allow fast function calls. Unfortunately, a l...
ASPLOS
1992
ACM
13 years 9 months ago
1992
ACM
The foremost goal of superscalar processor design is to increase performance through the exploitation of instruction-level parallelism (ILP). Previous studies have shown that spec...
ISCA
1996
IEEE
13 years 9 months ago
1996
IEEE
Simultaneous multithreading is a technique that permits multiple independent threads to issue multiple instructions each cycle. In previous work we demonstrated the performance po...
CASES
2000
ACM
13 years 8 months ago
2000
ACM
This paper introduces the notion of a Flexible Instruction Processor (FIP) for systematic customisation of instruction processor design and implementation. The features of our app...
CF
2010
ACM
13 years 10 months ago
2010
ACM
We develop two simple interval-based models for dynamic superscalar processors. These models allow us to: i) predict with great accuracy performance and power consumption under va...