149 search results - page 3 / 30 » An approach for implementing efficient superscalar CISC proc... |
IEEEPACT
2006
IEEE
13 years 11 months ago
2006
IEEE
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
DATESO
2010
13 years 3 months ago
2010
Abstract. Current XPath processors use direct approach to query evaluation which is quite inefficient in some cases and usually implemented serially. This may be a problem in case ...
AMAI
2004
Springer
13 years 11 months ago
2004
Springer
The paper integrates automatically generated case-splitting expressions, and an efficient translation to CNF, in order to formally verify an out-of-order superscalar processor havi...
IJES
2008
13 years 5 months ago
2008
Block ciphers are used to encrypt data and provide data confidentiality. For interoperability reasons, it is desirable to support a variety of block ciphers efficiently. Of the bas...
IEEEPACT
1999
IEEE
13 years 10 months ago
1999
IEEE
Trace cache, an instruction fetch technique that reduces taken branch penalties by storing and fetching program instructions in dynamic execution order, dramatically improves inst...