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» An efficient transistor optimizer for custom circuits
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DELTA
2006
IEEE
13 years 9 months ago
Modified Montgomery Modular Multiplication Using 4: 2 Compressor and CSA Adder
The efficiency of the Public Key encryption systems like RSA and ECC can be improved with the adoption of a faster multiplication scheme. In this paper, Modified Montgomery multip...
Himanshu Thapliyal, Anvesh Ramasahayam, Vivek Redd...
CASES
2007
ACM
13 years 9 months ago
Performance-driven syntax-directed synthesis of asynchronous processors
The development of robust and efficient synthesis tools is important if asynchronous design is to gain more widespread acceptance. Syntax-directed translation is a powerful synthe...
Luis A. Plana, Doug A. Edwards, Sam Taylor, Luis A...
HPCA
2008
IEEE
14 years 5 months ago
Supporting highly-decoupled thread-level redundancy for parallel programs
The continued scaling of device dimensions and the operating voltage reduces the critical charge and thus natural noise tolerance level of transistors. As a result, circuits can p...
M. Wasiur Rashid, Michael C. Huang
ISCAS
2005
IEEE
191views Hardware» more  ISCAS 2005»
13 years 11 months ago
Behavioural modeling and simulation of a switched-current phase locked loop
Recent work has shown that the use of switched current methods can provide an effective route to implementation of analog IC functionality using a standard digital CMOS process. Fu...
Peter R. Wilson, Reuben Wilcock
EGH
2010
Springer
13 years 3 months ago
Hardware implementation of micropolygon rasterization with motion and defocus blur
Current GPUs rasterize micropolygons (polygons approximately one pixel in size) inefficiently. Additionally, they do not natively support triangle rasterization with jittered samp...
J. S. Brunhaver, Kayvon Fatahalian, Pat Hanrahan