73 search results - page 3 / 15 » An instruction-level energy model for embedded VLIW architec... |
VLSID
2004
IEEE
14 years 6 months ago
2004
IEEE
With increasing demands for high performance by embedded systems, especially by digital signal processing applications, embedded processors must increase available instruction lev...
LCTRTS
2007
Springer
13 years 11 months ago
2007
Springer
The run-time performance of VLIW (very long instruction word) microprocessors depends heavily on the effectiveness of its associated optimizing compiler. Typical VLIW compiler pha...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
— The growing use of digital signal processors (DSPs) in embedded systems necessitates the use of optimizing compilers supporting their special architecture features. Beside the ...
DATE
2003
IEEE
13 years 11 months ago
2003
IEEE
This paper presents a new algorithm for on-the-fly data compression in high performance VLIW processors. The algorithm aggressively targets energy minimization of some of the domi...
IJES
2007
13 years 5 months ago
2007
Abstract: Tomorrow’s embedded devices need to run high-resolution multimedia applications which need an enormous computational complexity with a very low energy consumption const...