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SENSYS
2005
ACM
13 years 11 months ago
Estimating clock uncertainty for efficient duty-cycling in sensor networks
Radio duty cycling has received significant attention in sensor networking literature, particularly in the form of protocols for medium access control and topology management. Whi...
Saurabh Ganeriwal, Deepak Ganesan, Hohyun Shim, Vl...
ISCA
2012
IEEE
243views Hardware» more  ISCA 2012»
11 years 8 months ago
Lane decoupling for improving the timing-error resiliency of wide-SIMD architectures
A significant portion of the energy dissipated in modern integrated circuits is consumed by the overhead associated with timing guardbands that ensure reliable execution. Timing ...
Evgeni Krimer, Patrick Chiang, Mattan Erez
FMICS
2009
Springer
14 years 9 days ago
A Rigorous Methodology for Composing Services
on Abstraction: a Lightweight Approach to Modelling Concurrency. Javier de Dios and Ricardo Peña Certified Implementation on top of the Java Virtual Machine 19:00 Social dinner + ...
Kenneth J. Turner, Koon Leai Larry Tan
ARCS
2009
Springer
14 years 10 days ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...
JSAC
2008
202views more  JSAC 2008»
13 years 5 months ago
Cognitive Wireless Mesh Networks with Dynamic Spectrum Access
Wireless Mesh Networks (WMNs) are envisaged to extend Internet access and other networking services in personal, local, campus, and metropolitan areas. Mesh routers (MR) form the c...
Kaushik R. Chowdhury, Ian F. Akyildiz