9 search results - page 1 / 2 » Analysis and Optimization of Ground Bounce in Digital CMOS C... |
ICCD
2000
IEEE
14 years 1 months ago
2000
IEEE
This paper is concerned with the analysis and optimization of the ground bounce in digital CMOS circuits. First, an analytical method for calculating of the ground bounce is presen...
DAC
2006
ACM
14 years 6 months ago
2006
ACM
Designing an energy efficient power gating structure is an important and challenging task in Multi-Threshold CMOS (MTCMOS) circuit design. In order to achieve a very low power des...
DATE
2005
IEEE
13 years 7 months ago
2005
IEEE
This paper reports a novel simulation methodology for analysis and prediction of substrate noise impact on analog / RF circuits taking into account the role of the parasitic resis...
DATE
2008
IEEE
13 years 11 months ago
2008
IEEE
Sleep transistor insertion is one of today’s most promising and widely adopted solutions for controlling stand-by leakage power in nanometer circuits. Although single-cycle powe...
Lecture Notes
VLSI (Very Large Scale Integration) CMOS (Complementary Metal Oxide Semiconductor) technology is the main driver of our digital revolution. The goals of these lecture are to learn ...